High-Frequency Bandpass Delta-Sigma Analog-to-Digital Conversion

This thesis demonstrates that analog-to-digital (A/D) conversion at the intermediatefrequency stage of a radio is feasible for a wide range of cellular and cordless telephony standards. Placing the A/D converter as close as possible to the front end of the radio has manufacturing advantages and allows the use of sophisticated DSP algorithms which are especially usem with digitally coded transmissions. The type of conversion proposed is a switched-capacitor (switched-C) implementation of a bandpass delta-sigm& (BPAZ) modulator. This thesis adhsses the performance of BPAZ A/D converters by focussing on larger bandwidths (1.2MHz) and higher centre frequencies (2OMHz) than previously obtained, while maintaining 12 bit resolution. An 8*-order 3-level BPAX A/D modulator is designed to meet these specifications. Through modelling and simulation, it is shown that for low oversampling ratios large gains in signal-to-noise ratio cannot be obtained when going to higher-order modulators. However, by increasing the number of levels in the quantizer, the performance of thg modulator can be gnzatly enhanced by taking advantage of the added stability. Two 2nd-order BPAX A/D modulator prototypes were implemented in a 0.8pm BiCMOS process to determine the maximum sampling frequency obtainable in a switched-C technology. The two structures both use fi~lly differential OTh with continuous-time common-mode feedback, but employ different clock phasing to experiment with trade-offs between active and passive sensitivities. An analysis of the effects of nonideal OT& on the switched-C biquads is done and compared to experimental results with very good correlation.